Title

Realization of 4D Lattice-Ladder Digital Filters

Document Type

Conference Proceeding

Publication Date

4-11-2016

Abstract

A circuit realization is presented for four-dimensional (4D) lattice-ladder discrete filters. The proposed 4D circuit realization requires, for its implementation, a minimum number of delay elements. Further, the dimension of the state-vector, of the derived 4D state-space model, is minimal and its 4D transfer function is characterized by the all-pass property. A step-by-step low-order example is provided to demonstrate the proposed minimality of both, circuit, and state-space realizations. An educational conjointment of 4D lattice filters with lower dimension filters (2D, 1D), is imparted.

DOI

10.1109/LASCAS.2016.7450998

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